1. Field of the Invention
The present invention relates generally to improving noise-immunity in an integrated phase-locked loop (PLL), and specifically to integrating a differentially-controlled LC-voltage-controlled oscillator (VCO), charge pump, and loop filter architecture into a PLL.
2. Description of Related Art
High performance voltage-controlled oscillators (VCOs) are critical components in high bit rate transmission systems. These VCOs are the heart of any phase-locked loop (PLL) based frequency synthesizer. As such, the VCO consumes a major fraction of the overall power of the frequency synthesizer, and the performance of the VCO determines to a large extent the performance of the whole synthesizer. The VCO basically functions as a frequency generator for the PLL. A typical PLL 10 is illustrated in FIG. 1 consisting of a phase detector 12, charge pump 14, loop filter 16, and VCO 18, where a frequency divider is often positioned after the VCO 18 as well. Several LC-VCO designs fully integrated into a PLL are known which are tuned by combining multiple resonators or by using varactors. In a fully integrated VCO, the tuning range should be large enough to cover for the frequency variations over temperature and process corners. For a typical control voltage from 0 to 3 volts, this results in a very large VCO gain. This high VCO gain increases the sensitivity of the VCO to supply, ground, and substrate noise, which makes it very difficult to integrate the VCO with other noisy components on the same chip.
In order to reduce the sensitivity of the VCO to the noise generated by other circuits sharing the same substrate and/or supply, it is highly desirable to have a differentially controlled VCO. There are several types of VCO's, including relaxation oscillators, ring oscillators, and LC-tuned oscillators. The principle of differential control has been used in both ring and relaxation type oscillators. In these types of oscillators, the frequency is usually controlled by changing a bias current, which can easily be done differentially in an integrated environment without sacrificing the tuning range. The situation is different for LC-based VCO's, where a single ended control input is commonly used as a reverse bias for a PN diode used as a varactor. FIG. 2 illustrates a common architecture for an integrated NMOS LC-based VCO. The nature of varactor diodes available in a CMOS process causes a major drawback to the type of architecture shown in FIG. 2. The varactor in a typical CMOS technology is built by diffusing a P.sup.+ region over an N-well, producing the parasitic vertical PNP transistor available in such process. This varactor structure has the problem of having the N-well to P-substrate junction diode hanging on the sensitive tank circuit point, which adds a huge parasitic capacitance to the circuit. This capacitance is untunable and severely reduces the tuning range of the LC-VCO. This architecture also has the drawback that the parasitic capacitance is biased from V.sub.dd to the substrate which increases the oscillation frequency sensitivity to supply fluctuations which defines the frequency pushing characteristics of the VCO.
In order to alleviate the parasitic junction diode problem and facilitate a differential control for the VCO, circuits utilizing decoupling capacitors C.sub.d1 and C.sub.d2 have been used to decouple the varactors from the circuit's direct current (DC), as shown in FIG. 3. The varactor is then biased by the differential control inputs V.sub.ct1 and V.sub.ct2. The AC decoupling resistors R.sub.ct1 and R.sub.ct2 are necessary to isolate the two differential RF output nodes. These decoupling resistors should be large enough to minimize their loading effect on the VCO RF output while being as low as possible to minimize their noise contribution to the varactor modulation. The polarity of the varactor diodes can be chosen to avoid the effect of the parasitic diodes by connecting them to the virtual ground at V.sub.ct1. The decoupling capacitors C.sub.d1 and C.sub.d2 are designed to be large enough to reduce their effect on the varactor capacitance seen by the tank. However, the parasitic capacitance added to the tank due to the bottom plate capacitance of these large decoupling capacitors is a considerable portion of the main capacitor and hangs in parallel with the main tank circuit, which also reduce the tuning range of the LC-VCO. This makes this type of architecture undesirable for a typical process, where the achievable tuning range using a control voltage from 0 to 3.0 volts is less than the frequency variations due to process tolerances. Thus, prior attempts at differentially controlling an LC-VCO have resulted in a reduction in the varactor tuning range. This reduction in the varactor tunability increases the required VCO power consumption in order to maintain the same tuning range without degrading the phase noise performance.
There is a need for a PLL having a differentially controlled LC-VCO which does not significantly increase PLL power consumption and which also does not sacrifice the tuning range of the LC-VCO. Moreover, there is a need for a differentially controlled LC-VCO and associated differential charge pump architecture implemented in a PLL which provides improved immunity to supply, ground, and substrate noise.